000 00887cam a22002417a 4500
999 _c331545
_d331545
020 _a9780387300375 (cased)
020 _a0387300376 (cased)
020 _a9780387485508 (eISBN)
020 _a0387485503 (eISBN)
082 0 4 _a621.395
_bPRA
100 1 _aSaxena, Prashant.
245 1 0 _aRouting congestion in VLSI circuits :
_bestimation and optimization /
_cPrashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar.
260 _aNew York :
_bSpringer,
_cc2007.
300 _axiv, 248 p. :
_bill. ;
504 _aIncludes bibliographical references and index.
650 0 _aIntegrated circuits
650 0 _aRouting (Computer network management)
700 1 _aShelar, Rupesh S.
700 1 _aSapatnekar, Sachin S.,
856 4 1 _uhttp://www.loc.gov/catdir/toc/fy0803/2006939848.html
856 4 2 _uhttp://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html
942 _cBK