000 00622cam a2200217ua 4500
001 2705
005 20220105002220.0
007 ta
008 081121s2008 g b000 u eng u
041 1 _aeng
_hNULL
082 1 4 _a004.25
_bASH
100 1 _a Ashenden, Peter J .
245 1 0 _aDigital design an embedded systems approach using verilog /
_cPeter J Ashenden.
_hTextual Documents
260 _aNew York :
_bElsevier ,
_c2008.
300 _aNULL ;
_cNULL.
653 0 _aDigital design
653 0 _aEmbedded System
942 _cBK
999 _c300338
_d300338