Saxena, Prashant. <br/><br/>
Routing congestion in VLSI circuits :  estimation and optimization / 
Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. 
 - New York :  Springer,  c2007. 
 - xiv, 248 p. :  ill. ; 
<br/><br/>Includes bibliographical references and index. 
<br/><br/><label>ISBN: </label>9780387300375 (cased) 0387300376 (cased) 9780387485508 (eISBN) 0387485503 (eISBN) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Integrated circuits<br/>Routing (Computer network management)
<br/><br/><label>Dewey Class. No.: </label>621.395  / PRA