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Logic synthesis and verification algorithms Hachtel, Gary D.; Somenzi, Fabio

By:

Hachtel, Gary D

Material type: Text

Text

TextPublication details: Boulder: Springer, 1996.ISBN:

9780387310046

DDC classification:

621.395 HAC

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Holdings
Item type	Current library	Home library	Call number	Status	Date due	Barcode
Book	Dept. of Futures Studies Processing Center	Dept. of Futures Studies	621.395 HAC (Browse shelf(Opens below))	Available		DFS3952

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Previous	621.39092 KAH Jony Ive : the genius behind Apple's greatest products /	621.3916 MAR The complete PC upgrade and maintenance guide /	621.392 AID Proceedings of the Workshop on Computer Aided Engineering and Design : trends and applications in product development & production	621.395 HAC Logic synthesis and verification algorithms	621.395 JOH Application Specific integrated circuits/	621.395 PRA Routing congestion in VLSI circuits : estimation and optimization /	621.395 WES Principles of CMOS VLSI design : a systems perspective	Next

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