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Multi-Net optimization of VLSI Interconnect

By:

Moiseev, Konstantin

Material type: Text

Text

TextPublication details: NewYork Springer 2015DDC classification:

621.3815 MOI.M

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Holdings
Item type	Current library	Home library	Call number	Status	Date due	Barcode
Book	Campus Library Kariavattom Processing Center	Campus Library Kariavattom	621.3815 MOI.M (Browse shelf(Opens below))	Available		UCL23760

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Previous	621.3815 HUI Analog circuit design: Sealable analog circuit design, high speed D/A converters, RF power amplifiers	621.3815 MIL Electronic devices and circuits	621.3815 MIL.I Integrated electronics: Analog and digital circuits and systems	621.3815 MOI.M Multi-Net optimization of VLSI Interconnect	621.3815 MOS.S Semiconductor devices, circuits and systems	621.3815 MUR.S Solid state electronics	621.3815 PAT.B Basic electronic devices and circuits	Next

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